Specification of 74HC163 Test Program

Program Outline

Equipment
CX1000P/D CX1000_MCU
CTLab
Rev 2.30.05 or later
Work Project
74HC163.zip
Required IPs
Measuremnet IC
SN74HC163 [Texas Instruments Incorporated]
Purpose
Self-learning for IC Test [Sample Program]

Test Condition

The test conditions of sample program are as follows.

Measure Item Name Type VDD Upper Limit Lower Limit Notes
Signal Contact (-) FT Function 0V -300mV -900mV
Signal Contact (-) DC DC 0V -300mV -900mV
Signal Contact (+) FT Function 0V 1.2V 300mV
Signal Contact (+) DC DC 0V 1.2V 300mV
VCC Contact [Short Test] DC -0.2V -200nA
IIL Test DC 6.0V 100mA -100mA
IIH Test DC 6.0V 100mA -100mA
Function Test Function 6.0V Verify Function using Pattern
Function Test Function 4.5V Verify Function using Pattern
Function Test Function 2.0V Verify Function using Pattern
Function Test Function 4.5V Verify Function using Pattern
Function Test Function 6V Verify Function using Pattern
ICC Test DC 6V 8uA
VOH Test DC 6V 5.9V Applied Current -20uA
VOH Test DC 4.5V 4.4V Applied Current -20uA
VOH Test DC 2.0V 1.9V Applied Current -20uA
VOH Test DC 4.5V 3.98V Applied Current -4mA
VOH Test DC 6.0V 5.48V Applied Current -5.2mA
VOL Test DC 6V 0.1V Applied Current 20uA
VOL Test DC 4.5V 0.1V Applied Current 20uA
VOL Test DC 2.0V 0.1V Applied Current 20uA
VOL Test DC 4.5V 0.26V Applied Current 4mA
VOL Test DC 6.0V 0.26V Applied Current 5.2mA
VIH Test DC 6.0V 4.2V Binary Serch
VIH Test DC 4.5V 3.15V Binary Serch
VIH Test DC 2.0V 1.5V Binary Serch
VIL Test DC 6.0V 1.8V Binary Serch
VIL Test DC 4.5V 1.35V Binary Serch
VIL Test DC 2.0V 0.5V Binary Serch
Fclock Test AC 6.0V 36MHz Binary Serch
Fclock Test AC 4.5V 30MHz Binary Serch
Fclock Test AC 2.0V 6MHz Binary Serch
CLK Width AC 6.0V 14ns Binary Serch
CLK Width AC 4.5V 16ns Binary Serch
CLK Width AC 2.0V 80ns Binary Serch
Setup A-D to CLK AC 6.0V 26ns Binary Serch
Setup A-D to CLK AC 4.5V 30ns Binary Serch
Setup A-D to CLK AC 2.0V 150ns Binary Serch
Setup ENP/ENT to CLK AC 6.0V 29ns Binary Serch
Setup ENP/ENT to CLK AC 4.5V 34ns Binary Serch
Setup ENP/ENT to CLK AC 2.0V 170ns Binary Serch
Setup Load to CLK AC 6.0V 23ns Binary Serch
Setup Load to CLK AC 4.5V 27ns Binary Serch
Setup Load to CLK AC 2.0V 135ns Binary Serch
Setup CLR low to CLK AC 6.0V 27ns Binary Serch
Setup CLR low to CLK AC 4.5V 32ns Binary Serch
Setup CLR low to CLK AC 2.0V 160ns Binary Serch
Setup CLR inactive to CLK AC 6.0V 27ns Binary Serch
Setup CLR inactive to CLK AC 4.5V 32ns Binary Serch
Setup CLR inactive to CLK AC 2.0V 160ns Binary Serch
Hold A-D to CLK AC 6.0V 0ns Binary Serch
Hold A-D to CLK AC 4.5V 0ns Binary Serch
Hold A-D to CLK AC 2.0V 0ns Binary Serch
Hold ENP/ENT to CLK AC 6.0V 0ns Binary Serch
Hold ENP/ENT to CLK AC 4.5V 0ns Binary Serch
Hold ENP/ENT to CLK AC 2.0V 0ns Binary Serch
Hold Load to CLK AC 6.0V 0ns Binary Serch
Hold Load to CLK AC 4.5V 0ns Binary Serch
Hold Load to CLK AC 2.0V 0ns Binary Serch
Delay ENT to RCO AC 6.0V 33ns Binary Serch
Delay ENT to RCO AC 4.5V 39ns Binary Serch
Delay ENT to RCO AC 2.0V 195ns Binary Serch
Delay CLK to RCO AC 6.0V 37ns Binary Serch
Delay CLK to RCO AC 4.5V 43ns Binary Serch
Delay CLK to RCO AC 2.0V 215ns Binary Serch
Delay CLK to Qn AC 6.0V 35ns Binary Serch
Delay CLK to Qn AC 4.5V 41ns Binary Serch
Delay CLK to Qn AC 2.0V 205ns Binary Serch

Pin Connection

Pin assignment between IC signal and CX1000P/D is as follows.

Notes:

Connect a 0.1uF capacitor between VCC Pin and GND plate near the IC.

Make the short between GND Signal of IC and ground plane of the test board by the shortest possible line.

For more information of making the test board, refer to CX1000 User’s manual.

PLEASE READ CAREFULLY

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Updated at
January 18, 2018